A mobile phone will be exemplified to describe a mounting structure of electronic components including semiconductors.
Various electronic components are mounted on a mounting board inside a mobile phone. Functions of the board are largely classified into the following configurations.
That is, an RF (radio frequency) unit which receives high-frequency waves from a cell site (base station) by an antenna and reduces the frequency to make it low enough to be processed and/or amplifies the high-frequency waves to radio waves transmittable to the cell site, and a baseband unit including: a CPU (central processing unit) which processes received signals; various application processors which process images, audio etc.; and/or a memory device (memory). Frequencies of the transceived radio waves processed by the RF unit are as follows.
First, frequencies used in respective communication standards in Japan are: 800 MHz band for PDC (personal digital cellular); 1.5 MHz band for cdmaOne (code division multiple access one); 1.7 GHz band for CDMA200, and 2100 MHz band for W-CDMA (wideband code division multiple access).
Also, frequencies used in the global communication system GSM (global system for mobile communications) systems being mainly used in Europe are 900 MHz band and 1800 to 1900 MHz band. Frequencies used in the communication system D-AMPS (digital advanced mobile phone system) being used in United States and Canada are in 800 MHz band and 900 MHz band.
A component which amplifies transmitted waves so that the waves have respective frequencies of the above for transmitting radio waves from a phone to a cell site is power amplifier. There are various communication systems/frequency compatible types by way of selecting and combining frequencies from those mentioned above depending on the ways of use and regions. Since the output characteristics of a transistor(s) which amplifies radio waves in the power amplifier are nonlinear, noise of second harmonic and third harmonic is generated in the output of the part desired to have ensured efficiency.
While the circuit is designed to remove the noise on the transmitted waves by a filter, noise is generated from the power amplifier component itself, and it may negatively affect peripheral electronic components including semiconductors.
To describe high-frequency devices having a wireless function, mobile phones in Japan will be exemplified. Except for the power amplifier, there are near field wireless communication by infrared communication and/or Bluetooth, a TV tuner for the one-segment broadcasting in 400 MHz band, an FM/AM radio tuner, etc. In the future, various wireless communications such as WiFi (wireless fidelity) wireless LAN are expected to be mounted. Therefore, it is necessary to concern interactive influence of electromagnetic noise generated from these electronic components.
Second, a CPU that achieves main function in a phone, a main memory device, various application processors handling images, video, music, security etc., various memories, and/or passive components are mounted in the baseband unit. Clock frequencies of these application processors have been increased year by year. When they are mounted separately from an external memory, instruction error is easily generated due to disturbance noise.
In view of preventing the error, design load reduction, power consumption reduction, and mounting area reduction, a structure of stacking and packaging a processor and a memory has been increasingly employed. While current flows in a bonding wire when transmitting/receiving high-speed signals between an application processor and a memory, the wire part becomes an antenna to generate electromagnetic waves, so that a magnetic field and an electric field (noise) are generated in the line path of the current.
As to a countermeasure for noise of a mounting board in a mobile phone, when there is relatively a margin in the arrangement of semiconductor components and so the components which are feared to have noise interference can be separately mounted, normally, a metal cap is mounted in a large area size per function block unit so that a shielding effect can be obtained.
However, in the trend of high functionality and ultra-thin frame of recent mobile phones, the design is made to eliminate dead space as making a sterically mounting arrangement by packing components into available space. In such a design, it is difficult to ensure a mounting area for large components, even for the indispensable shielding cap. However, there has been a problem of posing erroneous operation due to influence of noise in removing the metal cap and neighboring a semiconductor for high-speed communication, a semiconductor for high-speed image processing and a power amplifier of an RF circuit as a single package without a shield.
For example, as to an electronic component aiming for individual shielding, as described in Japanese Patent Application Laid-Open Publication No. 2005-322752 (Patent Document 1), a structure in which a metal cap is put on a mounting board with respect to a module in which an IC and/or passive components are mounted on a board is generally used to solve the above problem.
However, in this structure, the inside of the cap is not resin-molded, and thus there is a difficulty in mass production when the resin molding process of large semiconductor packages to be formed with resin molding is changed to a metal cap structure, because the cost of the metal cap is expensive.
In addition, as an area of a substrate for ensuring a thickness of the metal cap and/or a mounting area is necessary, the electronic parts cannot be down-sized. Also, while the electronic components are mounted on a board of a product by solder reflow after shipment, one of typical lead-free solders to be used in the reflow is Sn3Ag0.5Cu solder paste.
A temperature of a reflow process in which a SnAgCu-based Pb-free solder paste is printed and the solder is heated to be melted is set such that a temperature higher than or equal to 217° C. which is a melting point of the Sn3Ag0.5Cu solder is ensured for about 40 to 60 seconds, for example.
In this time, the peak temperature is set to about 260° C. It is predicted that the electronic components will be subjected to the heating process at least once and three times at the most for connection of the components themselves. Incidentally, the three-time heating process is effects of connection of the components themselves, repair heating of adjacent components, and heating for mounting new components.
The electronic components may absorb water on the way of transfer. On that assumption, the JEDEC (joint electron device engineering council) standard sets a reliability guarantee standard of sensitivity level with respect to humidity to which the product is exposed in order to guarantee that there is no problem in the connecting points by performing heating complying with reflow after a water absorption test for a fixed period.
For example, JEDEC LEVEL 2 preconditions a reflow test of “subjecting the component in a relatively humid environment of 85° C./85% for 168 hours followed by reflow at 260° C. for three times.” If the component meets JEDEC LEVEL 2, a solder reflow connection of the component is guaranteed after leaving the product in a relatively humid atmosphere at 30° C. or lower and in 85% relative humidity of actual environment. If the electronic component does not meet JEDEC LEVEL 2, volume of water sneaked into the electronic component is expanded when the electronic component is assembled and mounted by reflow, resulting in a defect of exfoliation of an adhering surface and/or a connection portion inside the component.
Accordingly, there have been conventional methods which satisfy downsizing and high reliability in electronic components by forming a metal plating film, which can substitute the metal cap, on a mold resin.
Japanese Patent Application Laid-Open Publication No. 2004-297054 (Patent Document 2) and Japanese Patent Application Laid-Open Publication No. 2005-109306 (Patent Document 3) describe such methods of forming an electromagnetic shield to a semiconductor package.
Patent Document 2 discloses an example of an electromagnetic shield structure in which a shielding film is formed to cover the surface of a semiconductor device including semiconductor ICs mounted on a multilayer wiring board and subjected to resin molding, and the shielding film is electrically connected to a cut wiring portion(s) protruding at an edge portion(s) of the multilayer board. It is described that the shielding film is formed of a conductive paste by plating, sputtering, or CVD.
Also, Patent Document 3 discloses a method for achieving improvement of package shielding and reduction in size, height and weight of electronic components, and providing a sufficient shielding effect even to high frequencies, the method providing: a circuit board having a ground pattern; an electronic component mounted on a top surface of the circuit board; a sealant of an epoxy resin containing inorganic filler molding the mounted components; and a metal shield layer formed of a nonelectrolytic Cu (copper) plating layer, an electrolytic Cu plating layer, and an anti-oxidation layer for copper of these layers, the metal shield layer being formed on the sealant and connected with the ground pattern.